Emerging Nanoelectronic Technology and Integrated Systems Laboratory
Emerging Nanoelectronic Technology and Integrated Systems Laboratory
"Experimental demonstration of third-order memristor-based artificial sensory nervous system for neuro-inspired robotics"
S. Park, H. Jeong, S. Seo, Y. Kwon, J. Lee**, and S. Choi**
Nature Communications 16, 5754 (2025)
"Decoupling strategy to separate training andinference withthree-dimensional neuromorphic hardware composed of neurons and hybrid synapses"
J. Lee* , S. Park* , S. Yun* , Y. Kim, H. Myung, S. Choi**, and Y. Choi**
ACS Nano 19, 13063–13072 (2025)
"Self-supervised video processing with self-calibration on an analogue computing platform based on a selector-less memristor array"
H. Jeong*, S. Han*, S. Park, T. Kim, J. Bae, T. Jang, Y. Cho, S. Seo, H. Jeong, S. Park, T. Park, J. Oh, J. Park, K. Koh, K. Kim, D. Jeon, I. Kwon, Y. Yoon**, S. Choi**
Nature Electronics 8, 168–178 (2025)
"Ultra-Low Power and Reliable Dynamic Memtransistor Based on Charge Storage Junction FET with Step-Wise Potential Barrier for Energy-Efficient Edge Computing Framework"
T. Park*, S. Seo, Y. Kim, S. Park, S. Choi, S. Hong, H. Jeong, S. Choi**
Advanced Electronic Materials 10, e202300904 (2024)
"Realization of Selector-Memory Bi-Functionality with Self-Current Regulation Utilizing Poly-Crystalline Based GST Electrolyte for Memristor Hardware Development"
S. Hong*, S. Park, H. Jeong, T. Park, Y. Cho, T. Jang, S. Sung, H. Ahn, J. Lee, S. Choi**
Advanced Materials Interfaces 11, 2300975 (2024)
"Linear Conductance Update Improvement of CMOS-Compatible Second-Order Memristors for Fast and Energy-Efficient Training of Neural Network Using a Memristor Crossbar Array"
S. Park*, T. Park, H.Jeong, S. Hong, S. Seo, Y. Kwon, J. Lee, S. Choi**
Nanoscale Horizons 8, 1366–1376 (2023)
(Highlight) Selected as front cover image
"Recent Advances and Future Prospects for Memristive Materials, Devices and Systems"
(Invited Review)
M. Song*, J. Kang*, X. Zhang, W. Ji, A. Ascoli, I. Messaris, A. S. Demirkol, B. Dong, S. Aggarwal, W. Wan, S. Hong, S. G. Cardwell, I. Boybat,J. Seo, J. Lee, M. Lanza, H. Yeon, M. Onen, J. Li, B. Yildiz, J. del Alamo, S. Kim, S. Choi, G. Milano, C. Ricciardi, L. Alff, Y. Chai, Z. Wang,H. Bhaskaran, M. C. Hersam, D. Strukov, H.-S. P. Wong, I. Valov, B. Gao, H. Wu, R. Tetzlaff, A. Sebastian, W. Lu, L. Chua, J. Joshua Yang, J. Kim**
ACS Nano 17, 11994–12039 (2023)
"The Effect of Schottky Barrier Modulation on Conduction and Failure Mechanisms of an Ag/WOx/p-Si Based Memristor"
T. Park*, H.Jeong, S. Park, S. Hong, S. Seo, S. Park, S. Choi**
Journal of Applied Physics 133, 075701 (2023)
"Retention Secured Nonlinear and Self-Rectifying Analog Charge Trap Memristor for Energy Efficient Neuromorphic Hardware"
G. Kim, S. Son, H. Song, J. Jeon, J. Lee, W. Cheong, S. Choi, K. Kim**
Advanced Science 10, 2205654 (2023)
"The gate injection-based field-effect synapse transistor with linear conductance update for online training"
S. Seo*, B.Kim*, D. Kim*, S. Park*, T.R. Kim, J.Park, H.Jeong, S. Park, T. Park, H.Shin, M.Kim, Y. Choi, S. Choi**
The gate injection-based field-effect synapse transistor with linear conductance update for online training
Nature Communications 13, 6431 (2022)
(Press) Introduced to various media (see News for details)
(Highlight) Featured in Nature Communications Collection of Neuromorphic Hardware and Computing [Link]
"Experimental demonstration of highly reliable dynamic memristor for artificial neuron and neuromorphic computing"
S. Park*, H. Jeong*, J. Park*, J.Bae, S. Choi**
Nature Communications 13, 2888 (2022)
(Highlight) Featured in Nature Communications Collection of Neuromorphic Hardware and Computing [Link]
(Highlight) Selected as Featured Image In Nature Communications Homepage
(Highlight) Featured In Nature Communications Editors' Highlights
(Award) Selected for the KAIST 2022 Fall Breakthrough Research of the College of Engineering [Link]
(Press) Introduced to various media (see News for details)
"Reliable multilevel memristive neuromorphic devices based on amorphous matrix via quasi-1D filament confinement and buffer layer"
S. Choi*, S. Park*, S. Seo, S. Choi**
Science Advances 8, eabj7866 (2022)
(Press) Introduced to various media (see News for details)
"An Overturned Charge Injection Synaptic Transistor With a Floating-Gate for Neuromorphic Hardware Computing"
M. Kim, J. Kim, G. Yun, J. Yu, J. Han, J. Lee, S, Seo, S. Choi, Y. Choi**
IEEE Electron Device Letters 43, 1489–1492 (2022)
"SPICE study of STDP characteristics in a drift and diffusive memristor-based synapse for neuromorphic"
S. Hu, J. Kang, T. Kim, S. Lee, J. Park, I. Kim, J. Kim, J. Kwak, J. Park, G. Kim. S. Choi†, Y. Jeong†
IEEE Access 10, 6381–6392 (2022) (Co-corresponding author)
"Engineering MoSe2/MoS2 Heterojunction Traps in 2D Transistors for Multilevel Memory, Multiscale Display, and Synaptic Functions"
Y. Jeong, H. Lee, J. Park, S. Lee, H. Jin, S. Park, H. Cho, S. Hong, T. Kim, K. Kim, S. Choi, S. Im**
NPJ 2D Materials and Applications 6, 24 (2022)
"Heterogeneous and Monolithic 3D Integration of III–V-Based Radio Frequency Devices on Si CMOS Circuits"
J. Jeong, S. Kim, J. Kim, D. Geum, D. Kim, E. Jo, H. Jeong, J. Park, J. Jang, S. Choi, I. Kwon**, S. Kim**
ACS Nano 16, 9031–9040 (2022)
"Neural Network Physically Unclonable Function: A Trainable Physically Unclonable Function System with Unassailability against Deep Learning Attacks Using Memristor Array"
J. Park, Y. Lee, H. Jeong, S. Choi**
Advanced Intelligent Systems 3, 2100111 (2021)
(Cover) Selected as the front cover. [Link]
"Nonvolatile and Neuromorphic Memory Devices Using Interfacial Traps in Two Dimensional WSe2/MoTe2 Stack Channel"
S. Park, Y. Jeong, H. Jin, J. Park, H. Jang, S. Lee, W. Huh, H. Cho, H. G. Shin, K. Kim, C. Lee, S. Choi, S. Im**
ACS Nano 14, 12064–12071 (2020)
"Conductive-Bridging Random-Access Memories for Emerging Neuromorphic Computing"
J. Cha*, S.Y. Yang*, J. Oh*, S. Choi, S. Park, B.C. Jang, W.Ahn, S. Choi**
Nanoscale 12, 14339–14368 (2020)
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Perspective: Uniform Switching of Artificial Synapses for Large-Scale Neuromorphic Arrays
S. Tan, P. Lin, H. Yeon, S. Choi, Y. Park and J. Kim
APL Materials 6, 120901 (2018)
SiGe Epitaxial Memory for Neuromorphic Computing with Reproducible High Performance Based on Engineered Dislocations
S. Choi*, S. Tan*, Z. Li, Y. Kim, C. Choi, P. Chen, H. Yeon, S. Yu and J. Kim
Nature Materials 17, 335–340 (2018)
(News & Views) Highlighted in News & Views of Nature Materials
(MIT new) Spotlighted in MIT main page, MIT news
Remote epitaxy through graphene for two-dimensional material based layer transfer
Y. Kim, S. Cruz, K. Lee, B. Alawode, C. Choi, Y. Song, J. Johnson, C. Heidelberger, W. Kong, S. Choi, K. Qiao, I. Almansouri, E. Fitzgerald, J. Kong, A. Kolpak, J. Hwang, and J. Kim
Nature 544, 340–343 (2017)
(Cover) Selected as the front cover.
Experimental Demonstration of Feature Extraction and Dimensionality Reduction using Memristor Networks
S. Choi*, J. Shin*, J. Lee and W. Lu
Nano Letters 17, 3113–3118 (2017)
(Highlight) Highlighted in Nature Nanotechnology.
Data Clustering using Memristor Networks
S. Choi*, P. Sheridan*, and W. D. Lu
Scientific Reports 5, 10492. (2015)
Experimental Demonstration of a Second-Order Memristor and Its Ability to Biorealistically Implement Synaptic Plasticity
S. Kim, C. Du, P. Sheridan, W. Ma, S. Choi, and W. D. Lu
Nano Letters 15, 2203–2211. (2015)
Tuning Resistive Switching Characteristics of Tantalum Oxide Memristors through Si Doping
S. Kim*, S. Choi*, J. Lee, and W. Lu
ACS Nano 8, 10262–10269. (2014)
Electrochemical Dynamics of Nanoscale Metallic Inclusions in Dielectrics
Y. Yang, P. Gao, L. Li, X. Pan, S. Tappertzhofen, S.Choi, R. Waser, I. Valov, and W. Lu
Nature Communications 5, 4232. (2014)
Retention Failure Analysis of Metal-Oxide Based Resistive Memory
S. Choi, J. Lee, and W. Lu
Applied Physics Letters 105, 113510. (2014)
Comprehensive Physical Model of Dynamic Resistive Switching in an Oxide Memristor
S. Kim, S. Choi, and W. Lu
ACS Nano 8, 2369–2376. (2014)
Random Telegraph Noise and Resistance Switching Analysis of Oxide Based Resistive Memory
S. Choi, Y. Yang, and W. Lu
Nanoscale 6, 400–404. (2014)
Oxide Heterostructure Resistive Memory
Y. Yang, S. Choi, and W. Lu
Nano Letters 13, 2908 (2013)
Stochastic Memristive Devices for Computing and Neuromorphic Applications
S. Gaba, P. Sheridan, J. Jiantao, S. Choi, and W. Lu
Nanoscale 5, 5872 (2013)
Efficient Si Nanowire Array Transfer via Bi-Layer Structure Formation Through Metal-Assisted Chemical Etching
T. Moon, L. Chen, S. Choi, C. Kim, and W. Lu
Advanced Functional Materials 24, 1949–1955 (2013)
Improvement of RRAM Device Performance Through On-Chip Resistors
S. Gaba, S. Choi, P. Sheridan, T. Chang, Y. Yang, and W. Lu
Mater. Res. Soc. Symp. Proc. 1430, 177 (2012).
* Equally contributed.
